Tool suite supports powerPC assembler family platforms for avionics

27th July 2017
Source: LDRA
Posted By : Lanna Cooper

Provider of standards compliance, automated software verification, software code analysis, and test tools, LDRA, has updated the tool suite for the PowerPC assembler language to support all 32- and 64-bit PowerPC chips used in safety-critical environments such as communication terminals, commercial and military avionics, unmanned air vehicles, and missile and space flight applications.

Such support enables LDRA customers, including those who have been using the LDRA tool suite for many years on traditional avionics platforms, to move to the latest versions of PowerPC chips and compilers, and confidently perform Object Code Verification (OCV) required for DO-178B/C compliance.

As the only company to provide a complete structural coverage analysis tool for both application source and assembler code from unit to system and integration levels, LDRA is making it easy for avionics customers to certify their systems as they upgrade their 604-based legacy PowerPC chips to the newer e500/600 chips. LDRA’s updated assemblers support the e200, e300, e500, e600, e5500, and e5600 PowerPC families, as well as traditional PowerPC chips such as the 603e and 604.

The LDRA tool suite is the only commercially available software solution able to qualify assembler code for certification. Used to demonstrate source-to-object-code traceability, the LDRA tool suite for PowerPC assemblers can analyse the relationship between the two levels of code and highlight any instances of additional or extraneous code at the object level. This integration ensures that the LDRA tool suite will support organisations that must demonstrate process compliance, particularly for applications where complete OCV must be realised to meet the highest levels of safety certification as required under the DO-178B/C Level A safety-assurance standard.

In addition, these updated assemblers have been integrated into the latest LDRA front ends, which enhances code visibility through a graphical display of assembler code. This results in compelling reports that show clearly that statements and branches have been exercised in the assembler code and cross-correlate the results between the high level language and assembler. API access is possible using LDRA data files and enables customers to retrieve results from assembler testing and integrate them with C/C++ test results. This capability is particularly useful in object code verification exercises. Full verification capabilities are available for both low power platforms (such as the e200) and full systems with multi-core environments where per-core coverage can be recorded.

The suite of PowerPC assemblers can also be used to test pure PowerPC assembler hand code. Test and verification activities can be performed on the assembler hand code portions of a system, as well as object code verification of the C/C++ portions.

“Historically, all microprocessors and microcontrollers on aircraft have been PowerPC-based, yet many of these legacy chips are no longer available or avionics manufacturers are seeking major improvements in performance,” said IanHennell, Operations Director, LDRA. “In either case, avionics OEMs are forced to switch from legacy to new PowerPC chips to make significant improvements to their DO-178B/C systems. As such systems are upgraded, they must comply with the latest certification requirements, which include in-depth analysis such as Object Code Verification. As the only commercially available solution to support all PowerPC processors, LDRA’s enhanced tool suite provides assurance for these safety-critical environments.”


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